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INTEGRATED CIRCUITS
74ABT16652 74ABTH16652 16-bit transceiver/register, non-inverting (3-State)
Product specification Supersedes data of 1995 Aug 17 IC23 Data Handbook 1998 Feb 27
Philips Semiconductors
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
FEATURES
* Independent registers for A and B buses * Multiple VCC and GND pins minimize switching noise * Power-up 3-State * 74ABTH16652 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
DESCRIPTION
The 74ABT16652 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT16652 transceiver/register consists of two sets of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes HIGH. Output Enable (nOEAB, (nOEBA) and Select (nSAB, nSBA) pins are provided for bus management. Two options are available, 74ABT16652 which does not have the bus-hold feature and 74ABTH16652 which incorporates the bus-hold feature.
* Power-up reset * Live insertion/extraction permitted * Multiplexed real-time and stored data * Output capability: +64mA/-32mA * Latch-up protection exceeds 500mA per JEDEC Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN CI/O ICCZ ICCL PARAMETER Propagation delay nAx to nBx Input capacitance I/O capacitance Quiescent supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC VO = 0V or VCC; 3-State Outputs disabled; VCC =5.5V Outputs low; VCC = 5.5V TYPICAL 2.3 1.8 4 7 500 8 UNIT ns pF pF A mA
ORDERING INFORMATION
PACKAGES 56-Pin Plastic SSOP Type III 56-Pin Plastic TSSOP Type II 56-Pin Plastic SSOP Type III 56-Pin Plastic TSSOP Type II TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74ABT16652 DL 74ABT16652 DGG 74ABTH16652 DL 74ABTH16652 DGG NORTH AMERICA BT16652 DL BT16652 DGG BH16652 DL BH16652 DGG DWG NUMBER SOT371-1 SOT364-1 SOT371-1 SOT364-1
LOGIC SYMBOL
1 56 28 29
1OEAB
1OEBA
2OEAB
14 13 12 10 9 8 6 5
1A7 1A6 1A5 1A4 1A3 1A2
1B7 1B6 1B5 1B4 1B3 1B2 1CPBA
43 44 45 47 48 49 51 52
24 23 21 20 19 17 16 15
2OEBA
2A7 2A6 2A5 2A4 2A3 2A2
2B7 2B6 2B5 2B4 2B3 2B2 2CPBA
33 34 36 37 38 40 41 42
1CPAB
2CPAB
1A1 1A0
1B1 1B0
2A1 2A0
2B1 2B0
1SAB
1SBA
2SAB
2
3 54 55
27 26 31 30
2SBA
SH00047
1998 Feb 27
2
853-1790 19026
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
PIN CONFIGURATION
1OEAB 1CPAB 1SAB GND 1A0 1A1 VCC 1A2 1A3 1A4 GND 1A5 1A6 1A7 2A0 2A1 2A2 GND 2A3 2A4 2A5 VCC 2A6 2A7 GND 2SAB 2CPAB 20EAB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OEBA 1CPBA 1SBA GND 1B0 1B1 VCC 1B2 1B3 1B4 GND 1B5 1B6 1B7 2B0 2B1 2B2 GND 2B3 2B4 2B5 VCC 2B6 2B7 GND 2SBA 2CPBA 2OEBA
LOGIC SYMBOL (IEEE/IEC)
1OEBA 56 1OEAB 1 1CPBA 55 1SBA 54 1CPAB 2 1SAB 3 2OEBA 29 2OEAB 28 2CPBA 30 2SBA 31 2CPAB 27 2SAB 26 EN1 [BA] EN2 [AB] C3 G4 C5 G6 EN7 [BA] EN8 [AB] C9 G10 C11 G12 w1 1 5D 1 1A1 1A2 1A3 6 8 9 6 6 51 1B1 49 1B2 48 1B3 47 1B4 45 1B5 44 1B6 43 1B7 7 w1 10 10 12 12 41 2B1 40 2B2 38 2B3 37 2B4 36 2B5 34 2B6 33 2B7 9D 1 w1 8 42 2B0 52 1B0
1AO
5
4 41 w1
3D
2
1A4 10 1A5 12 1A6 13 1A7 14 2A0 15
11D 1 2A1 16 2A2 17 2A3 19 2A4 20 2A5 21 2A6 23 2A7 24
SH00046
SH00045
PIN DESCRIPTION
PIN NUMBER 2, 55, 27, 30 3, 54, 26, 31 5, 6, 8, 9, 10, 12, 13, 14 15, 16, 17, 19, 20, 21, 23, 24 52, 51, 49, 48, 47, 45, 44, 43 42, 41, 40, 38, 37, 36, 34, 33 1, 56, 28, 29 4, 11, 18, 25, 32, 39, 46, 53 7, 22, 35, 50 SYMBOL 1CPAB, 1CPBA, 2CPAB, 2CPBA 1SAB, 1SBA, 2SAB, 2SBA 1A0 - 1A7, 2A0 - 2A7 1B0 - 1B7, 2B0 - 2B7 1OEAB, 1OEBA, 2OEAB, 2OEBA GND VCC NAME AND FUNCTION Clock input A to B / Clock input B to A Select input A to B / Select input B to A Data inputs/outputs (A side) Data inputs/outputs (B side) Output enable inputs Ground (0V) Positive supply voltage
1998 Feb 27
3
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
LOGIC DIAGRAM
nOEBA nOEAB nCPBA nSBA nCPAB nSAB
1of 8 Channels
1D C1 Q
nA0 1D C1 Q
nB0
nA1 nA2 nA3 nA4 nA5 nA6 nA7 DETAIL A X 7
nB1 nB2 nB3 nB4 nB5 nB6 nB7
SH00065
FUNCTION TABLE
INPUTS nOEAB L L X H L L L L H H H H L X * ** = = = = nOEBA H H H H X L L L H H L nCPAB H or L H or L X X X H or L H or L nCPBA H or L H or L X H or L X X H or L nSAB X X X ** X X X X L H H nSB A X X X X X ** L H X X H nAx Input Input Unspecified output* Output Input Output DATA I/O nBx Input Unspecified output* Input Input Output Output Isolation Store A and B data Store A, Hold B Store A in both registers Hold A, Store B Store B in both registers Real time B data to A bus Stored B data to A bus Real time A data to B bus Store A data to B bus Stored A data to B bus Stored B data to A bus OPERATING MODE
High voltage level Low voltage level Don't care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be staggered in order to load both registers.
1998 Feb 27
4
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ABT16652.The select pins determine whether data is stored or
transferred through the device in real time. The output enable pins determine the direction of the data flow.
REAL TIME BUS TRANSFER BUS B TO BUS A
REAL TIME BUS TRANSFER BUS A TO BUS B
STORAGE FROM A, B, OR A AND B
A
B
A
B
A
B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA L L X X X L
}
A
1998 Feb 27
nOEAB nOEBA nCPAB nCPBA nSAB nSBA H H X X L X
TRANSFER STORED DATA TO A OR B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA H L H|L H|L H H
}
L L X H
nOEAB nOEBA nCPAB nCPBA nSAB nSBA X H X X X X X X X X
}
B
}
SH00066
5
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IO OUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 DC output diode current DC output voltage3 DC output current output in HIGH state Storage temperature range -64 -65 to 150 C VO < 0 output in Off or HIGH state output in LOW state VI < 0 CONDITIONS RATING -0.5 to +7.0 -18 -1.2 to +7.0 -50 -0.5 to +5.5 128 mA UNIT V mA V mA V
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 -40 PARAMETER MIN 4.5 0 2.0 0.8 -32 64 10 +85 MAX 5.5 VCC V V V V mA mA ns/V C UNIT
1998 Feb 27
6
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C MIN VIK Input clamp voltage VCC = 4.5V; IIK = -18mA VCC = 4.5V; IOH = -3mA; VI = VIL or VIH VOH High-level output voltage VCC = 5.0V; IOH = -3mA; VI = VIL or VIH VCC = 4.5V; IOH = -32mA; VI = VIL or VIH VOL VRST II Low-level output voltage Power-up output low voltage3 Input leakage current VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 5.5V; IOL = 1mA; VI = GND or VCC VCC = 5 5V; VI = GND or VCC 5.5V; VCC = 4.5V; VI = 0.8V IHOLD Bus Hold B H ld current A or B t Ports5 74ABTH16652 Power-off leakage current Power-up/down 3-State output current4 3-State output High current 3-State output Low current Output High leakage current Output current1 VCC = 4.5V; VI = 2.0V VCC = 5.5V; VI = 0 to 5.5V IOFF IPU/PD IIH + IOZH IIL + IOZL ICEX IO ICCH ICCL ICCZ ICC Additional supply current per input pin2 74ABT16652 Additional supply current per input pin2 74ABTH16652 Quiescent supply current VCC = 0V; VO = 4.5V; VI = 0V or 5.5V VCC = 2.1V; VO = 0.0V; VI = GND or VCC VCC = 5.5V; VO = 5.5V; VI = VIL or VIH VCC = 5.5V; VO = 0.0V; VI = VIL or VIH VCC = 5.5V; VO = 5.5V; VI = GND or Vcc VCC = 5.5V; VO = 2.5V VCC = 5.5V; Outputs High, VI = GND or VCC VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; Outputs 3-State; VI = GND or VCC VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND -50 Control pins 35 -75 800 1.0 1.0 1.0 -1.0 5.0 -80 0.5 8 0.5 100 50 10 -10 50 -180 2 19 2 -50 100 50 10 -10 50 -180 2 19 2 A A A A A mA mA mA mA 2.5 3.0 2.0 TYP -0.9 2.9 4.0 2.4 0.35 0.13 0.01 0 01 0.55 0.55 1.0 1 0 35 -75 A MAX -1.2 2.5 3.0 2.0 0.55 0.55 1.0 1 0 Tamb = -40C to +85C MIN MAX -1.2 V V V V V V A A UNIT
5.0
50
50
A
ICC
200
500
500
A
NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0 and 2.1V. When the part enables with VCC between 2.1V and 4.5V, the outputs will correctly function with respect to all input logic states. 5. This is the bus hold overdrive current required to force the input to the opposite logic state.
1998 Feb 27
7
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM MIN fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Maximum clock frequency Propagation delay nCPAB to nBx or nCPBA to nAx Propagation delay nAx to nBx or nBx to nAx Propagation delay nSAB to nBx or nSBA to nAx Output enable time nOEBA to nAx Output disable time nOEBA to nAx Output enable time nOEAB to nBx Output disable time nOEAB to nBx 1 1 2 3 5 6 5 6 5 6 5 6 125 1.5 1.5 1.0 1.0 1.0 1.0 1.0 1.5 1.5 1.5 1.0 1.5 2.0 1.5 3.3 2.8 2.3 1.8 3.4 2.6 2.5 2.2 3.6 2.7 2.9 3.0 3.1 2.3 4.0 4.1 3.2 4.1 4.3 4.3 4.1 4.4 4.4 3.6 3.6 3.9 5.5 4.5 Tamb = VCC = +5.0V TYP +25oC MAX Tamb = -40 to +85oC VCC = +5.0V 0.5V MIN 125 1.5 1.5 1.0 1.0 1.0 1.0 1.0 1.5 1.5 1.5 1.0 1.5 2.0 1.5 4.9 4.7 3.9 4.6 5.0 5.0 5.0 5.3 4.9 4.0 4.2 4.6 5.9 5.2 MAX MHz ns ns ns ns ns ns ns UNIT
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V MIN ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup time nAx to nCPBA, nBx to nCPAB Hold time nAx to nCPBA, nBx to nCPAB Pulse width, High or Low nCPAB or nCPBA 4 4 1 3.0 3.0 1.0 1.0 4.3 4.3 TYP 1.2 0.8 -0.7 -1.1 1.0 1.0 Tamb = -40 to +85oC VCC = +5.0V 0.5V MIN 3.0 3.0 1.0 1.0 4.3 4.3 ns ns ns UNIT
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
1/fMAX nCPBA or nCPAB 3.0V or VCC whichever is less VM 0V tw(H) tPHL nAx or nBx VM tw(L) tPLH VOH VM VOL nBx or nAx 3.0V or VCC nAx or nBx VM tPLH VM 0V tPHL VOH VM VM VOL
VM
VM
SH00030
SH00048
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
Waveform 2. Propagation Delay, nAx to nBx or nBx to nAx
1998 Feb 27
8
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
AC WAVEFORMS (Continued)
VM = 1.5V, VIN = GND to 3.0V
3.0V or VCC whichever is less nOEBA nOEAB 0V tPHL nAx or nBx tPLH VOH VM VM VOL VM nAx or nBx 0V tPZH tPHZ VOH VY VM VM 0V
3.0V or VCC nSBA or nSAB VM VM
SH00050 SH00032
Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx
Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level
3.0V or VCC 0V tPZL nAx or nBx tPLZ 3.0V or VCC 0V
nAx or nBx
nCPBA or nCPAB
TEST CIRCUIT AND WAVEFORMS
VCC 7.0V VIN PULSE GENERATOR RT D.U.T. VOUT RL NEGATIVE PULSE 90% VM 10% tTHL (tf ) CL RL tTLH (tr ) 90% POSITIVE PULSE 10% tTHL (tf ) AMP (V) 90% VM tW 10% 0V tW VM 10% tTLH (tr ) 0V AMP (V)
SWITCH POSITION TEST tPLZ tPZL All other SWITCH closed closed open
DEFINITIONS: RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
1998 Feb 27
EEEEEEEEE EEE E EEEEEEEEE EEE E EEEEEEEEE EEE E
VM VM VM VM ts(H) th(H) ts(L) th(L) VM tW(L) VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
3.0V or VCC
nOEBA VM nOEAB VM
0V 3.0V or VCC 0V
VM
VX VOL
SH00051 SH00049
Waveform 4. Data Setup and Hold Times
Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
90%
Test Circuit for 3-State Outputs
VM
VM = 1.5V Input Pulse Definition
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74ABT16 3.0V Rep. Rate 1MHz tw 500ns tR 2.5ns tF 2.5ns
SH00022
9
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm
SOT371-1
1998 Feb 27
10
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
1998 Feb 27
11
Philips Semiconductors
Product specification
16-bit transceiver/register, non-inverting (3-State)
74ABT16652 74ABTH16652
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-03499
Philips Semiconductors
yyyy mmm dd 12

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